1. Field of the Invention
The present invention relates to physical quantity distribution detecting apparatuses and imaging apparatuses, and more particularly, to a physical quantity distribution detecting apparatus including a column-parallel analog-to-digital (AD) conversion unit and an imaging apparatus including a solid-state imaging device, which is the physical quantity distribution detecting apparatus, used as an imaging device.
2. Description of the Related Art
As physical quantity distribution detecting apparatuses for sensing distribution of physical quantities, for example, solid-state imaging devices are available in which a plurality of unit pixels (unit sensors) each including a photoelectric transducer for sensing the light intensity of incident light are two-dimensionally arranged in a matrix. Complementary metal-oxide semiconductor (CMOS) image sensors that can be produced in accordance with a process similar to that for CMOS integrated circuits (ICs) are widely known as solid-state imaging devices.
With miniaturization technology being used in CMOS processes, such CMOS image sensors easily achieve an active configuration in which an amplification function is provided for each pixel. In addition, in such CMOS image sensors, a driving circuit for driving a pixel array in which a plurality of pixels are two-dimensionally arranged in a matrix and a signal processing circuit can be integrated on a chip on which the pixel array is formed. In addition, compared with charge-coupled device (CCD) image sensors, which have been in the mainstream, CMOS image sensors can be driven at a higher speed. Thus, in recent years, much research and development on CMOS image sensors has been carried out.
As a signal output system of CMOS image sensors, a column-parallel output system in which pixels arranged in a pixel array are selected in units of rows and signals of pixels in a selected row are simultaneously read in a column direction (that is, a direction along pixel columns) is mainly used. Various configurations of a signal output circuit of such a parallel-output CMOS image sensor have been proposed. For example, a CMOS image sensor described in Japanese Unexamined Patent Application Publication No. 2005-328326 has one of the most advanced configurations. The CMOS image sensor includes a column-parallel AD conversion unit having a configuration in which AD converters are arranged for individual columns and analog signals output from pixels are extracted as digital signals.
A signal-to-noise (S/N) ratio by which the image quality of a CMOS image sensor is determined will be generally described. “S” represents a value obtained when a floating diffusion unit converts an electron stored in a pixel into a voltage. “N” represents optical shot noise that depends on the intensity of incident light, flicker noise (1/f noise) that depends on the size or process of an amplifying transistor provided in a pixel or a transistor provided in another analog circuit, white noise (thermal noise) that depends on a transistor resistance and a wiring resistance, or circuit noise caused by a potential variation in a power supply or a ground.
To date, no method has been developed for removing optical shot noise. Since optical shot noise is present in any image sensor, generally, optical shot noise components are not considered in the total noise when a method for increasing the S/N ratio is considered. That is, in general, reducing 1/f noise, white noise, and circuit noise caused by a variation in a power supply or a ground is important for increasing the S/N ratio.
In order to reduce 1/f noise, in general, the size of a transistor provided in a pixel or provided in a circuit through which an analog signal passes is increased or the width of a sampling frequency is reduced. In order to reduce white noise, in general, the pass-band width of a signal is reduced. This is because white noise is determined in accordance with the product of a noise density and the pass-band width of a signal. In order to reduce circuit noise caused by a variation in the power supply or the ground, in general, a constant of a transistor within a circuit is set so as to increase the power-supply voltage rejection ratio (PSRR) of a comparator.